Design and Simulation of 1-Bit Sigma–Delta ADC Using Ngspice Tool

Anup G. Dakre, Prof. A.M. Chopde


This paper presents the design of a first order       1-bit sigma-delta oversampling analog-to-digital converter (ADC) which is realized using CMOS technology .Power consumption is the major issue in VLSI Design. In this paper an efficient low power first Order 1-bit Sigma-Delta ADC designed which accept input signal bandwidth of 10 KHz and a 5 MHz sampling clock frequency and implemented in a standard 0.18μm n-well CMOS process. The ADC operates at 2.5 reference voltage. The Simulation of design is done by using Ngspice Simulation Software[8].  This paper firstly elaborate about ADC types and Classification among Nyquist rates and Oversampling ADCs. Further, design of    1-bit Sigma Delta ADC is to be proposed which consists of Opamp as a key component in Sigma delta ADC. Opamp at integrator stage is with the open loop voltage gain 10,530V/V, Gain Bandwidth (GB) is 5MHz, output resistance is 122.5KΩ, and power dissipation is                 0.806 mW.  Finally, a first order 1-bit Sigma Delta ADC is implemented using ±2.5 power supply and simulation results are plotted using Ngspice tool.


1-bit Sigma Delta ADC, CMOS Technology, Ngspice Tool


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