AREA EFFICIENT MODULAR ADDER/SUBTRACTOR FOR RESIDUE MODULI

G. CHANDANA, P. RAJINI

Abstract


Efficient modular adders and subtractors for arbitrary moduli are key booster of computational speed for high cardinality Residue Number Systems as they rely on arbitrary moduli set to expand the dynamic range. This paper proposes a new unified modular adder/subtractor that possesses a regular structure for any modulus. Compared to the latest modular adder/subtractor, which works for modulus in the forms of 2n±1 the proposed design is on average faster and consumes less hardware area and lower power for ‘n’ ranging from 4 to 8.

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